SAME Byte Synchronization
At this point we have a stream of bits arriving from our demodulator, and our task now is to assemble
bits into bytes. Since SAME characters are transmitted low bit first, we will be shifting bits in from the top.
/*
Bit Shift
SAME characters are sent low bit first
*/
static char bit_count;
static unsigned long shift_register;
shift_register >>= 1;
if (bit) shift_register |= 0x80000000;
bit_count++;
bit_count &= 7;
...
...
Since we are shifting in from the top, the SAME Start of Message code 'ZCZC' will appear in reverse order 'CZCZ',
which corresponds to 0x435a435a. Once this pattern is detected, we set a flag and zero the bit counter. This flag
blocks any further adjustment to the bit timing (as we say in the previous page), and allows for characters to be copied from the shift register to the
USART data register.
/*
Byte Sync
Looking for 'ZCZC'... backwards
*/
if (shift_register == 0x435a435a) {
sync_flag = 1;
bit_count = 0;
}
...
...
So, if the sync flag is set, and the bit count is zero, we may be ready to transmit a character, contained
in the low byte of the shift register. If it is a legitimate character in the SAME 'alphabet', we copy it to the
USART data register.
If it is not an allowed character, we have either reached the end of the SAME sentence, or we have
somehow lost synchronization. Either way, we need to terminate our output, which we do with the ASCII Line Feed character.
We also clear the sync flag, preparing to receive the next SAME sentence.
/*
Output every 8 bits, while in sync
*/
if (bit_count == 0 && sync_flag == 1) {
unsigned char same = shift_register & 0xff;
if (same & 0x80 || same < 43 || same > 'Z') {
sync_flag = 0;
UDR0 = 10;
}
else {
UDR0 = same;
}
} /* end (bit count == 0 blah blah) */
} /* end (block_index == 11) */
block_index++;
if (block_index > 11) block_index -= 12;
}
And with that we have completed our discussion of the demodulation/decoding of the SAME AFSK signals.
Our next discussion will be about testing the application.